Work in Shanghai on CMOS RF designs
Circuit design, analyses and simulations for CMOS RF circuits.
Support of layout and backend checks.
Chip testing and characterization. 

Two or more years in RFIC design for CMOS or BiCMOS analog and mixed-signal circuits.
Experience with RF circuits such as LNA, VCO, Mixers, and Transmitters.
Strong background in electromagnetics theory.
Experience with Cadence EDA design and layout tools.
Experience in lab debugging and chip characterization.
BSEE required. MSEE or Ph.D EE preferred.